Bus minimization and scheduling of multi-chip systems
نویسندگان
چکیده
This paper considers several diierent algorithms that reduce the required number of buses for multi-chip module design. An eecient polynomial time algorithm that calculates the minimum number of buses needed given a particular schedule is presented. We also present three algorithms that minimize the number of buses during scheduling. Experimental results are shown that illustrate the eeciency of the algorithms .
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تاریخ انتشار 1995